14.arch/DEC.liu
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.na
.LP
Design and Implementation of Active Messages on the Intel Paragon

Lok Tin Liu 

(Professor D. E. Culler)

Active Messages has been shown to be an efficient communication
mechanism on the CM-5 and nCUBE/2 [1]. However, the current
architecture and implementation of Active Messages suffer from several
limitations when applied to the new generation of massively parallel
multiprocessors (e.g., the Intel Paragon, the Cray T3D, and the Meiko
CS-2) and networks of workstations (NOW) connected by high-speed
communication networks. As a result, as part of the Castle and NOW
projects, research in an abstract communication layer for parallel
processing has been initiated to devise a scalable and portable
communication architecture on a variety of hardware platforms.

As part of this effort, Active Messages is being implemented on the
Intel Paragon. In the Paragon, each node consists of five Intel i860
microprocessors: four processors carry out computation as a shared
memory multiprocessor, and the fifth one handles communication with
the message-passing network. The communication processor offers the
ability to overlap computation and communication. But it also raises
the question on how Active Messages should use this processor
effectively and efficiently in conjunction with different programming
paradigms.

In addition, the nodes in the Paragon are interconnected by a 2D-mesh
with 200 MB/s bandwidth and support for broadcast and
synchronization. The nodes can be dynamically configured into various
partitions for general-purpose time-sharing or parallel processing.
Since both the user and operating system on all nodes share a single
network, process scheduling, buffer management, flow control, message
priority, deadlock avoidance, and congestion control all play important
roles in determining the network performance.

The goal of this research is to investigate various issues in the
design of an abstract communication layer as well as to gain insight
on the hardware and software requirements in building future parallel
computers.

[1]	T. von Eicken, D. E. Culler, S. C. Goldstein, K. E. Schauser,
"Active Messages: a Mechanism for Integrated Communication and 
Computation,"  Proc. 19th Int. Symp. Computer Architecture,
Gold Coast, Australia, May 1992.